A vertical-type semiconductor device having trench gate electrodes and a withstand-voltage assurance layer is already known. The semiconductor device of this type has a characteristic exhibiting a high withstand voltage and a characteristic exhibiting small on-resistance or a low on-voltage. The on-resistance of the semiconductor device of this type can be considered to be the sum of a drift resistance and a channel resistance. The drift resistance is a resistance in a withstand-voltage assurance layer whereas the channel resistance is the resistance of a current path created along a trench gate electrode. In the conventional semiconductor device, there is a tradeoff that, when a characteristic exhibiting a high withstand voltage is implemented, the on-resistance increases in consequence. In this case, since a large portion of the on-resistance is a drift resistance, in order to improve the characteristic exhibiting a high withstand voltage and the characteristic exhibiting a small on-resistance or a low on-voltage, a technology for beating down this tradeoff is required.
As a technology for beating down this tradeoff, a technology for creating a withstand-voltage assurance layer in the so-called super junction structure has been developed. The super-junction structure is a structure in which p-type columns are arranged repetitively and alternatively with respect to n-type columns. By adoption of the super-junction structure, a depletion layer spread from each of repetitively created pn junction boundary faces completely depletes the withstand-voltage assurance layer, so that the concentration of impurities in the p-type columns and the n-type columns can be increased without losing the withstand-voltage characteristic. As a result, a characteristic exhibiting a high withstand voltage and a characteristic exhibiting a small on-resistance or a low on-voltage can be realized.
The following references, the contents of which are incorporated herein by reference, disclose that adoption of the super-junction structure makes it possible to implement a characteristic exhibiting a high withstand voltage and a characteristic exhibiting a small on-resistance or a low on-voltage.
Non-patent reference 1: Optimization of the Specific On-Resistance of COOLMOSTM, Xing-Bi-Chen and Johnny K. O. Sin, IEEE Transactions on Electron Devices, Vol. 48, No. 2, pp. 344-348, February, 2001.
Patent Reference 1: U.S. Pat. No. 5,216,275
The super-junction structure is known as a structure in which sheet p-type columns are arranged repetitively and alternatively with respect to sheet n-type columns. In the super-junction structure having such a configuration, regularity is repeated in one direction so that the super-junction structure can be called a one-dimensional super-junction structure.
On the other hand, another super-junction structure is also known as a structure in which p-type columns each having typically a square cross section are arranged repetitively and alternatively with respect to n-type columns each having typically a square cross section to form a cross-woven lattice. In the super-junction structure having such a configuration, regularity is repeated in two directions, so that the super-junction structure can be called a two-dimensional super-junction structure. A further super-junction structure is also known as a structure in which p-type columns each having typically a hexagonal cross section are arranged repetitively and n-type columns are placed in gaps between the p-type columns to form a honeybee nest shape. In the super-junction structure having such a configuration, regularity is repeated in three directions, so that the super-junction structure can be called a three-dimensional super-junction structure.
In a multi-dimensional super-junction structure, the ratio of the number of n-type columns to the number of p-type columns is higher than that in the one-dimensional super-junction structure. Thus, in a multi-dimensional super-junction structure, a low drift resistance can be implemented.
By adoption of a super-junction structure in a withstand-voltage assurance layer, the drift resistance can be reduced while a withstand voltage is being assured. In particular, by adoption of a multi-dimensional super-junction structure, the drift resistance can be much reduced. When the drift resistance is reduced by adoption of a multi-dimensional super-junction structure, the effect of the channel resistance on the on-resistance increases relatively. A technology for suppressing dispersions of a channel resistance or the channel resistance itself is of importance to a semiconductor device with the drift resistance reduced by adoption of a multi-dimensional super-junction structure. The channel resistance is determined by a relation between the position of a group of trench gate electrodes and the position of the multi-dimensional super junction.
For a pattern on the face of a multi-dimensional super junction structure, however, the position of a group of trench gate electrodes is difficult to adjust with a high degree of accuracy, so that dispersions of a channel resistance cannot be suppressed.